Design of FPGA Accelerator for Radar Intelligent Anti-jamming Decision-Making Based on Deep Reinforcement Learning
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College of Electronic and Information Engineering, Nanjing University of Aeronautics & Astronautics,Nanjing 211106,China

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TN911.7

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    Abstract:

    Aiming at the continuous intelligent anti-jamming decision-making and high real-time requirements of radar in high-dynamic environment, this paper constructs a deep Q network (DQN) model for radar intelligent anti-jamming decision-making, and proposes a hardware decision acceleration architecture based on field programmable gate array(FPGA). In this architecture, an on-chip access mode is designed for radar intelligent decision-making environment interaction to improve real-time performance, which simplifies the iterative process of continuous decision-making of the DQN agent through the on-chip quantitative storage and state iterative calculation for environment interaction. In the proposed architecture, both the parallel computing and pipeline control acceleration of agent deep neural network are adopted, which further improves the real-time performance of decision-making. Simulation and experimental results show that, on the premise of ensuring the accuracy of decision-making, the designed intelligent anti-jamming decision-making accelerator achieves a speedup of nearly 46 times in single decision-making and a speedup of nearly 84 times in continuous decision-making compared with the existing decision-making system based on the CPU platform.

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Li Ziyu, Ge Fen, Zhang Jindong, Zhao Jiachen. Design of FPGA Accelerator for Radar Intelligent Anti-jamming Decision-Making Based on Deep Reinforcement Learning[J].,2023,38(5):1151-1161.

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History
  • Received:April 13,2022
  • Revised:August 28,2022
  • Adopted:
  • Online: September 25,2023
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