Design and Verification of a High-Speed Data Storage Method
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1.College of Electrical and Control Engineering,North University of China,Taiyuan 030051,China;2.Software Center of Shandong Institute of Aerospace Electronics Technology,Yantai 264010, China

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TM933

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    Abstract:

    Aiming at the problems of data discontinuity and slow transmission speed in the traditional flash storage process, a storage method combining double FIFO ping-pong operation reading and writing with four-line flash writing is designed to improve the data storage rate. Through the accurate analysis of chip operation time, the resource utilization rate is improved. The system uses FPGA as the control chip, as well as creates two FIFOs through IP core, which is used for ping-pong reading and writing of data, and uses four chips of two NAND FLASH chips to form four-line operation. The feasibility, storage rate and storage continuity of the pipelined operation are verified by Modelsim simulation and FPGA generated pseudo-random code data write-read experiment and read-data correlation detection test. Combining with the infrared camera to collect and store data, and then through the host computer to read, the correct and continuous infrared image is displayed. By expanding the number of caches and flash chips, the continuity can be ensured and the storage rate can be improved, showing that the system has the characteristics of high storage rate and strong adaptability.

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ZHAO Yue, YU Hongying, WANG Yiqi. Design and Verification of a High-Speed Data Storage Method[J].,2021,36(2):384-390.

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History
  • Received:May 18,2020
  • Revised:October 16,2020
  • Adopted:
  • Online: March 25,2021
  • Published:
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