Fast Fourier transform (FFT) is a key block in the field of digital signal processing (DSP). A low hardware-cost 128-point FFT for UWB system is presented in this paper. Mixed radix-24-23 algorithm is adopted, and single-path delay feedback (SDF) architecture is used for hardware implementation. A novel cascade canonical signed digit (CSD) multiplier is proposed for the complex multiplication of W128i instead of the common booth multiplier, which can significantly reduce the hardware-cost. Based on QUARTUS PRIME tool with Cyclone 10 LP, the proposed scheme is developed, and the compilation report shows that the proposed scheme has the least hardware-cost and power consumption compared with the existing schemes.