A discrete density evolution algorithm for Turbo decoding message passing(TDMP) decoding algorithm is proposed to solve the problem of fixed parameter selection in efficient LDPC decoder design. By using the discrete density evolution algorithm, the modification factors and the quantization precision in the decoding algorithm are optimized. Compared with the traditional method, the efficiency is greatly improved and the effect is significant. Experimental results show that the performance of the optimized fixed-point decoder is only about 0.1 dB worse compared with the pure floating-point simulation. In the structure design of the decoder, a P-message circular memory structure based on distributed RAM is proposed. Compared with the traditional memory structure based on register and Benes network, the resource consumption is obviously decreased. The hardware implementation and test on FPGA platform of Xilinx company show that it has some advantages in terms of resource consumption and throughput compared with the same kind of decoder, and it is an efficient LDPC hardware decoder.