一种高速数据存储方法的设计与验证
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1.中北大学电气与控制工程学院,太原 030051;2.山东航天电子技术研究所软件中心,烟台 264010

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Design and Verification of a High-Speed Data Storage Method
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1.College of Electrical and Control Engineering,North University of China,Taiyuan 030051,China;2.Software Center of Shandong Institute of Aerospace Electronics Technology,Yantai 264010, China

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    摘要:

    针对传统FLASH存储过程中存在的数据不连续、传输速度慢的问题,设计了一种双FIFO乒乓操作读写和四流水线FLASH写入结合的存储方法,提高了数据存储速率。通过对芯片操作时间的精确分析,提高了资源利用率。系统用FPGA作为主控芯片,通过例化IP核创建了两个FIFO,用作数据的乒乓读写,并用两块NAND FLASH芯片的四个片选构成四流水线操作。通过Modelsim仿真工作过程、FPGA生成伪随机码的数据写-读实验和读出数据的相关性检测试验验证了该流水操作的可行性、存储速率和存储连续性。结合红外相机实物采集并存储数据,然后通过上位机读取,得到了正确、连续的红外图像。通过扩展缓存和FLASH片数,可以在保证连续性的同时提高存储的速率,即该系统具有存储速率高、适应性强的特点。

    Abstract:

    Aiming at the problems of data discontinuity and slow transmission speed in the traditional flash storage process, a storage method combining double FIFO ping-pong operation reading and writing with four-line flash writing is designed to improve the data storage rate. Through the accurate analysis of chip operation time, the resource utilization rate is improved. The system uses FPGA as the control chip, as well as creates two FIFOs through IP core, which is used for ping-pong reading and writing of data, and uses four chips of two NAND FLASH chips to form four-line operation. The feasibility, storage rate and storage continuity of the pipelined operation are verified by Modelsim simulation and FPGA generated pseudo-random code data write-read experiment and read-data correlation detection test. Combining with the infrared camera to collect and store data, and then through the host computer to read, the correct and continuous infrared image is displayed. By expanding the number of caches and flash chips, the continuity can be ensured and the storage rate can be improved, showing that the system has the characteristics of high storage rate and strong adaptability.

    图1 存储系统设计Fig.1 Storage system design
    图2 四流水线写入工作过程Fig.2 Four-line writing process
    图3 数据存储仿真时序图Fig.3 Data storage simulation sequence diagram
    图4 仿真数据显示Fig.4 Simulation data display
    图5 硬件总体设计Fig.5 Overall design of hardware
    图6 系统PCB设计Fig.6 System PCB design
    图7 上位机读出的数据Fig.7 Data read by the host computer
    图8 相关性检测试验结果Fig.8 Results of correlation test
    图9 上位机显示的相机图像Fig.9 Camera image displayed by the host computer
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引用本文

赵越,余红英,王一奇.一种高速数据存储方法的设计与验证[J].数据采集与处理,2021,36(2):384-390

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  • 收稿日期:2020-05-18
  • 最后修改日期:2020-10-16
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  • 在线发布日期: 2021-03-25